This invention relates to display devices and scan line driver circuits. Specifically, the invention relates to a liquid crystal display device including multiplex pixels or to a scan line driver circuit for use in the liquid crystal display device, for example.
Recently, enhancement in higher resolution of displays, which has been conventionally slow-paced in CRT displays, is showing dramatic improvements in line with introduction of new technologies including liquid crystal. Particularly, liquid crystal display devices can achieve higher definition relatively easily as compared to CRT displays by means of incorporating micro fabrication.
An active-matrix-type liquid crystal display device using thin-film transistors (TFTs) as switching elements is known as a typical liquid crystal display device. The active-matrix-type liquid crystal display device includes a TFT array substrate, in which scan lines and signal lines are arranged in a matrix and thin-film transistors are arranged on intersection points thereof. A liquid crystal material is filled in a gap between the TFT array substrate and a counter substrate disposed at a given distance from the TFT array substrate. Further, the thin-film transistors control voltages to be applied to the liquid crystal material, thus performing display by use of electro-optic effects of the liquid crystal.
FIG. 21 is an equivalent circuit diagram of pixels formed on the TFT array substrate. In FIG. 21, signal lines 30 and scan lines 40 are arranged in a matrix, and an area surrounded by the signal lines 30 and the scan lines 40 constitutes a single pixel. The single pixel includes a pixel electrode 20 and a TFT 10 connected thereto. When the scan line 40 is set to selection potential, the TFT is turned on. Display potential (a display signal) is given by the signal line 30 to the pixel electrode 20. The display potential controls an intensity of light which passes through liquid crystal.
In general, the following problems have been proposed in connection with an increase in the number of pixels associated with enhancement in higher definition of an active-matrix-type liquid crystal display device. Specifically, numbers of signal lines and scan lines are substantially increased along with an increase in the number of pixels, thus incurring an increase in the number of driver ICs and a cost rise. Moreover, an electrode pitch for connection between a driver IC and an array substrate is narrowed, whereby connection becomes more difficult and a process yield upon connection is deteriorated.
In order to solve these problems simultaneously, disclosed are proposals for imparting electric potential from one signal line to two adjacent pixels by time-division so that the number of necessary data driver ICs are reduced and pitches between connection terminals are widened. Such proposals include Japanese Unexamined Patent Publications No. 6(1994)-148680, No. 11(1999)-2837, No. 5(1993)-265045, No. 5(1993)-188395 and No. 5(1993)-303114, for example.
FIG. 22 shows one of the proposals disclosed in Japanese Unexamined Patent Publication No. 5(1993)-265045. The proposal includes a structure in which two pixels are connected to one signal line via TFTs P1 to P3. A pixel electrode (i, k) and a pixel electrode (i, k+1) are included in the same row. That is, display potential is given to these two pixel electrodes in one scanning cycle. The pixel electrode (i, k) is connected to a signal line 6-j via two TFTs P1 and P2. Meanwhile, the pixel electrode (i, k+1) is connected to the signal line 6-j via one TFT P3.
Operations of these two pixels will be now described. In a first period, a scan line 8-i and a scan line 8-i+1 are set to the selection potential. In this way, the TFTs P1, P2 and P3 are turned on. First display potential given to the signal line 6-j is supplied to the pixel electrode (i, k) and the pixel electrode (i, k+1). Display potential of the pixel electrode (i, k) is thereby determined. In a second period, the selection potential is given to the scan line 8-i and non-selection potential is given to the scan line 8-i+1. Second display potential given to the signal line 6-j is supplied to the pixel electrode (i, k+1). Display potential of the pixel electrode (i, k+1) is thereby determined.
Accordingly, the number of the signal lines can be reduced by half as many as the number required in a conventional mode. Therefore, the number of outputs of data drivers can be also reduced by half.
However, in the conventional inventions concerning multiplex-pixel LCDs, an influence by parasitic capacitance between each pixel electrode and a gate line (or a gate electrode) is not considered. As it will be described later in the preferred embodiments of this invention, a plurality of pixels (multiplex pixels) provided with display potential from one signal line in one scanning period show different variations of pixel potential because of the parasitic capacitance. Such a difference is incurred by a difference in pixel structures among the respective pixels, or alternatively, by a difference in orders of selection (orders to provide the display potential).
The difference in the variations of pixel potential owing to the parasitic capacitance deteriorates accuracy in voltages to be applied to the pixels. Particularly, the difference causes significant luminance unevenness among the pixels in the event of halftone display.